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NWC01N56W48K supports WPC 2.X standard and is a one-chip wireless charging TX controller MCU with 32Bit RISC CPU, Embedded Program Memory, and various dedicated IPs
| CPU & Memory | - 32 bit CPU core - 48KB EEPROM - 6KB SRAM - 2KB Buffer RAM for ADC |
|---|---|
| Clock | - 16 / 96MHz internal RC - External X-tal clock |
| Power | - Input VCC range : 3.9V ~ 20V - 3.3V LDO for peripherals & IO - 1.5V LDO for CPU - AVDD pin for ADC power. - LVD (2.6~2.9V range) Typ:2.8V |
| 12bit ADC | - One 12bit ADC with 10channel input - 9 channel input from GPIO pins - 1 channel input through special OPAMP |
| OPAMP | - 2 channel special OPAMP for communication - 3 channel rail to rail non inverting |
| PWM | - Total 3 pair Full bridge - High side level shift(Max. 20V) - Low side level shift(Max. VCC) - Support 4 kinds of mode. - External crystal clock source(Xin, Xout) |
| I2C & UART | - 1 channel UART Tx debug - 1 channel IIC with (master/slave function) |
| Timer | - 4 channel 16-bit Timer for GP - Watchdog timer - 16-bit Sub RC Timer |
| GPIO | - Configurable 16pin GPIO - Configurable Pull-up/down resistor - Configurable Timer output for BUZ and LED |
| Peak to Peak Logic | - Automatic detection of peak to peak value while defined PWM period - 2KB buffer RAM with DMA |